This document provides Factory and field procedures for calibrating and independently verifying the 10 MHz time base in the Ri7100A system.
Factory Calibration:
Equipment Required:
Secondary GPS frequency standard, 10 MHz, better than 1e-10 absolute accuracy
Frequency counter, able to count 10 MHz, with external time base input.
Procedure:
The 10 MHz TCXO, located in the RIFL master must be adjusted for frequency accuracy. After initial adjustment, the accuracy is good for the life of the tester.
Note that the tester must be continuously operating for at least 24 hours before the time base can be adjusted.
- Connect the counter's time base input to the frequency standard. Be sure the counter is set to 'external time base reference'. If the counter
does not display "EXTREF" check the BNC cable coming from the time base standard for proper hook up.
- Connect the counter to WF8. Using the control panel, set the sine generator to 10 MHz, 1V P-P. The sine generator matches precisely the tester time base frequency.
- The time base frequency should be 10 MHz +/-5 Hz (0.5 ppm).
- If the time base frequency is not 10 MHz +/-5 Hz, adjust it as follows:
- Open the module browser window. Select the RIFL master (Ri8501B), Right Mouse Button Click (RMBC) and select 'Inspect'.
- Double-click on 'nodeInfo', then select 'RefOffset'. Change the reference offset in the right window. Note that a change of '5' in the reference offset represents roughly 1 Hz change in the time base. Select 'File' 'Save'.
- Close all inspection windows. Close the previous inspection window. In the 'Module Browser' window, select 'Node' 'EE Save Node Info'.
- Perform a system startup. Set the sine gen to 10 MHz, 1V again. Confirm that the frequency is 10 MHz +/-5 Hz. If not, repeat the above steps until the frequency is correct.
- Perform a system startup again. Review the startup information for all of the sources. Confirm that the 'Ref Offset' for each source is within +/-4. If not, that source time base is bad and must be replaced.
The system timebase is now calibrated to be within +/-0.5 ppm. At the maximum specified aging rate, the system will remain within spec for >20 years.
Field Verification/Calibration:
The time base is specified to remain within tolerance for a period of 20 years. Additionally, the 'consensus of time bases' guarantees to a high confidence that the time base is correct. (ref. document Understanding Frequency (Time Base) Accuracy on the Roos 7100A Testers.) However, if independent confirmation is desired, the following procedure can be used:
Equipment Required:
Frequency counter, properly calibrated to better than 1e-8 absolute frequency accuracy, able to count 10 MHz.
Note that both the frequency counter and the tester must be continuously operating for at least 24 hours before the time base can be verified or adjusted.
Procedure:
- Connect the counter to WF8. Using the control panel, set the sine generator to 10 MHz, 1V P-P. The sine generator now precisely matches the time base frequency.
- The time base frequency should be 10 MHz +/-30 Hz (3 ppm).
- If the time base frequency is not 10 MHz +/-30 Hz, adjust it as follows:
Caution: This procedure modifies permanent memory in the tester. Failure to precisely follow this process can result in improper operation of the tester.
- Perform a system startup. Review the startup information for all of the sources. Note the 'Ref Offset' for each source. (The Ref Offset represents the reference phase lock voltage, in volts.) Calculate how much the time base needs to change to make all the Ref Offsets average to 0.
- Open the module browser window. Select the RIFL master (Ri8501B), Right Mouse Button Click (RMBC) and select 'Inspect'.
- Double-click on 'nodeInfo', then select 'RefOffset'. Change the reference offset in the right window. Note that a change of '50' in the reference offset represents roughly 1 Volt change in the phase lock voltage. Select 'File' 'Save'.
Example: If the 'Ref Offsets' at startup are: Src1: +3.2, Src2: +2.7, Src3: -1.5, RecLO: +0.4
then (3.2 + 2.7 - 1.5 + 0.4) / 4 = 1.2V
so the average is 1.2V high and should be
lowered by 1.2V.
-1.2 * 50 = -60 (So the DAC number must be
reduced by approximately 60.)
After adjustment, the 'Ref Offsets would be: Src1: +2.0, Src2: +1.5, Src3: -2.7, RecLO: -0.8
for an average of 0
- Close the inspection window. Close the previous inspection window. In the 'Module Browser' window, select 'Node' 'EE Save Node Info'.
- Perform a system startup. Confirm that the average of the Ref Offsets is 0.
Field Verification/Calibration (continued)
- Using the control panel, set the sine gen to 10 MHz, 1V again. Confirm that the frequency is 10 MHz +/-30 Hz. If the oscillator frequency is too high, use the process above to set the time base to 10 MHz +25 Hz (10,000,025 Hz). If it is too low, use the above process to set the oscillator frequency to 10 MHz -25 Hz (9,999,975 Hz). Note that a change of '5' in the reference offset represents approximately a 1 Hz frequency change.
- Perform a system startup again. Review the startup information for all of the sources. Confirm that the 'Ref Offset' for each source is within +/-5V. If not, that source time base is bad and must be replaced.
The system timebase is now verified to be within +/-3 ppm. At the maximum specified aging rate, the system will remain within spec for an additional 10 years.